A Threshold-Embedded Offset Calibration Technique for Folding Flash ADCs

被引:0
|
作者
Tang, Tzu-Yi [1 ]
Zeng, Jhao-Wei [1 ]
Chen, Kevin [2 ]
Tsai, Tsung-Heng [1 ]
机构
[1] Natl Chung Cheng Univ, Dept Elect Engn, Chiayi, Taiwan
[2] Ind Tech Res Inst, Info & Comm Res Lab, Hsinchu, Taiwan
关键词
NM DIGITAL CMOS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A threshold-embedded offset calibration technique for inverter-based analog-to-digital converter (ADC) is presented. This work presents a background calibration technique for trimming the input-referred offsets of the comparators without interrupting the ADC's normal operation. Moreover, a folding flash architecture is employed to save the conversion power. The proposed calibration approach is based on the time-domain comparison. The random input-referred offsets of the comparators are converted to phase difference and detected by time-domain comparators. Simulation results show that the proposed compensation technique is validated. After calibration, the effective number of bits (ENOB) can be significantly improved from 3.4 bit to 5.7 bit.
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页数:4
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