共 50 条
- [1] Building a Dynamically Reconfigurable System Through a High Development Flow [J]. 2015 18th Forum on Specification and Design Languages (FDL), 2015, : 107 - 114
- [2] Dynamically Reconfigurable Radios from a High-Level Specification [J]. NAECON 2008 - IEEE NATIONAL AEROSPACE AND ELECTRONICS CONFERENCE, 2008, : 198 - +
- [7] High-level synthesis challenges and solutions for a dynamically reconfigurable processor [J]. IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, ICCAD, 2006, : 870 - 876
- [8] High-level partitioning of digital systems based on dynamically reconfigurable devices [J]. FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS: RECONFIGURABLE COMPUTING IS GOING MAINSTREAM, 2002, 2438 : 271 - 280
- [9] High-level synthesis using genetic algorithms for dynamically reconfigurable FPGAs [J]. 23RD EUROMICRO CONFERENCE - NEW FRONTIERS OF INFORMATION TECHNOLOGY, PROCEEDINGS: SHORT CONTRIBUTIONS, 1997, : 234 - 243