Single-electron transistors with sidewall depletion gates on a silicon-on-insulator nano-wire

被引:5
|
作者
Kim, KR
Kim, DH
Sung, SK
Lee, JD
Park, BG
Choi, BH
Hwang, SW
Ahn, D
机构
[1] Univ Seoul, Interuniv Semicond Res Ctr, Sch Elect Engn, Kwanak Ku, Seoul 151742, South Korea
[2] Univ Seoul, Inst Quantum Informat Proc & Syst, Seoul 130743, South Korea
关键词
single-electron transistors; sidewall depletion gates; silicon-on-insulator; quantum dot; Coulomb oscillation; phase control; voltage gain;
D O I
10.1143/JJAP.41.2574
中图分类号
O59 [应用物理学];
学科分类号
摘要
Novel single-electron transistors with sidewall depletion gates on a silicon-on-insulator nano-wire have been fabricated by the conventional very large-scale integration technologies. The fabricated SETs show the controllable characteristics, which can be estimated from the device geometry. The electrically induced quantum dot is well defined in the intended spot and the fabricated SETs show reliable single-dot characteristics eliminating unintentionally formed potential barriers in a silicon-on-insulator nano-wire. Also, it shows multiple Coulomb oscillation peaks with a constant period. overcoming the drawbacks of the previously reported SETs based on electrically induced quantum dot. The Coulomb oscillation phase control and voltage gain larger than unity are the promising proper-ties of our devices for practical circuit application.
引用
收藏
页码:2574 / 2577
页数:4
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