Architecture of non volatile memory with multi-bit cells

被引:2
|
作者
Campardo, G [1 ]
Micheloni, R [1 ]
机构
[1] STMicroelect, Memory Prod Grp, Flash Memory Div, Agrate Brianza, MI, Italy
关键词
NOR flash memory; matrix organization; multilevel cell;
D O I
10.1016/S0167-9317(01)00618-9
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The typical characteristic of flash memory technology, its flexibility, is seen as the main factor that explains the strong evolution of its demand, continuously generating new applications with the typical pervasiveness of the innovative semiconductor products. But the flexibility also determines the peculiar position of this product in the market. Flash memories are not a dedicated product, but they can, according to the environment, appear sometimes either as a standard part or as an application-specific circuit. For all applications, however, Flash memories always play a strategic role. Matrix architecture is one the most complex item in a memory chip design. Dimensions must be reduced to the minimum and space optimisation must be maximized. (C) 2001 Elsevier Science B.V. All rights reserved.
引用
收藏
页码:173 / 181
页数:9
相关论文
共 50 条
  • [21] Helimagnet-based nonvolatile multi-bit memory units
    Islam, Rabiul
    Li, Peng
    Beg, Marijan
    Sachdev, Manoj
    Miao, Guo-Xing
    APPLIED PHYSICS LETTERS, 2023, 122 (15)
  • [22] Multi-Bit Compute-In Memory Architecture Using a C-2C Ladder Network
    Kushwaha, Dinesh
    Abotula, Jaya Kumar
    Kohli, Rajat
    Mishra, Jwalant
    Dasgupta, Sudeb
    Bulusu, Anand
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2024, 71 (06) : 3166 - 3170
  • [23] Area-efficient ferroelectric multi-bit memory device
    Kim, Woo Young
    MICROELECTRONIC ENGINEERING, 2018, 194 : 61 - 66
  • [24] Vertical multi-bit resonant tunneling diode memory cell
    vanderWagt, JPA
    Tang, H
    Broekaert, TPE
    Kao, YC
    Beam, EA
    1996 54TH ANNUAL DEVICE RESEARCH CONFERENCE DIGEST, 1996, : 168 - 169
  • [25] Non-volatile programmable homogeneous lateral MoTe2junction for multi-bit flash memory and high-performance optoelectronics
    Wu, Enxiu
    Xie, Yuan
    Wang, Shijie
    Zhang, Daihua
    Hu, Xiaodong
    Liu, Jing
    NANO RESEARCH, 2020, 13 (12) : 3445 - 3451
  • [26] Hybrid Hardware/Software Detection of Multi-Bit Upsets in Memory
    Thunig, Robin
    Borchert, Christoph
    Kober, Urs
    Schirmeier, Horst
    2024 54TH ANNUAL IEEE/IFIP INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS WORKSHOPS, DSN-W 2024, 2024, : 94 - 97
  • [27] The multiple fluorescent multi-bit DNA memory encoding system
    Nergui, Navchtsetseg
    Kim, Jongdo
    Lim, Doyeon
    Lee, Wonjin
    Kang, Taeseok
    Kim, Sejung
    Shim, Min Suk
    Song, Youngjun
    NANO COMMUNICATION NETWORKS, 2024, 39
  • [28] Non-volatile programmable homogeneous lateral MoTe2 junction for multi-bit flash memory and high-performance optoelectronics
    Enxiu Wu
    Yuan Xie
    Shijie Wang
    Daihua Zhang
    Xiaodong Hu
    Jing Liu
    Nano Research, 2020, 13 : 3445 - 3451
  • [29] Compression Architecture for Bit-write Reduction in Non-volatile Memory Technologies
    Dgien, David B.
    Palangappa, Poovaiah M.
    Hunter, Nathan A.
    Li, Jiayin
    Mohanram, Kartik
    2014 IEEE/ACM INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURES (NANOARCH), 2014, : 51 - 56
  • [30] Multi-bit Sigma-Delta TDC Architecture with Improved Linearity
    Uemori, Satoshi
    Ishii, Masamichi
    Kobayashi, Haruo
    Hirabayashi, Daiki
    Arakawa, Yuta
    Doi, Yuta
    Kobayashi, Osamu
    Matsuura, Tatsuji
    Niitsu, Kiichi
    Yano, Yuji
    Gake, Tatsuhiro
    Yamaguchi, Takahiro J.
    Takai, Nobukazu
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2013, 29 (06): : 879 - 892