CMOS voltage-controlled oscillator using inductive dual-balance source degeneration

被引：2

作者：

Chang, Yu-Hsin ^{[1
]}

Liang, Jyun-Fu ^{[1
]}

机构：

[1] Natl Formosa Univ, Dept Elect Engn, Huwei Township, Yunlin, Taiwan

来源：

ELECTRONICS LETTERS | 2022年 / 58卷 / 25期

关键词：

PHASE-LOCKED LOOP; VCO;

D O I：

10.1049/ell2.12657

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This study reports a voltage-controlled oscillator (VCO) implemented in a 0.18-mu m CMOS process. By utilizing an inductive dual-balance source degeneration (IDSD) technique with a current-reused structure, the proposed VCO improves the phase noise and the power dissipation. The measured output frequency operates at 2.91-3.07 GHz by adjusting a control voltage from 0 to 1.1 V. The measured phase noise of the carrier of 2.94 GHz is -117.44 and -138.34 dBc/Hz at 1- and 10-MHz offsets, respectively. The proposed VCO core consumes 2.38 mW from a supply voltage of 1.1 V. The figures-of-merits (FOMs) of the proposed VCO at 1- and 10-MHz offsets are -183.04 dBc/Hz and -183.94 dBc/Hz, respectively.

引用

页码：946 / 948

页数：3

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