Ultrathin Ni1-xPtx Films as Electrical Contact in CMOS Devices

Metal silicide films are likely to continue their function as electrical contact in CMOS devices beyond the 22-nm technology node. For such devices, the thickness of the silicide films is projected in the technology roadmap to be below 10 nm. Nickel-based silicides, especially the monosilicide Ni1-xPtxSi obtained by alloying Ni with Pt to a certain fraction, are among the most competitive choices for this application. For this specific family of silicides, the latest experimental investigations show that upon identical formation conditions (temperature and time), the phase, crystallinity, morphological stability, and thickness of resultant silicide films sensitively depend on the thickness and composition of initially deposited Ni1-xPtx layers. A proper understanding of these experimental observations is instrumental to design and control of ultrathin Ni1-xPtx silicide films with desired properties. In order to achieve low-resistivity electrical contact to Si, dopant segregation techniques can be combined with the so-called SADS (silicide as diffusion source) process to modify the Schottky barrier height between the silicide films and the underlying Si.