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- [42] Multiplicative masking and power analysis of AES CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2002, 2002, 2523 : 198 - 212
- [43] Analysis of Ciphertext Behaviour Using the Example of the AES Block Cipher in ECB, CBC, OFB and CFB Modes of Operation, Using Multiple Encryption INTELLIGENT INFORMATION AND DATABASE SYSTEMS, ACIIDS 2022, PT II, 2022, 13758 : 621 - 629
- [44] Anatomy of Differential Power Analysis for AES PROCEEDINGS OF THE 10TH INTERNATIONAL SYMPOSIUM ON SYMBOLIC AND NUMERIC ALGORITHMS FOR SCIENTIFIC COMPUTING, 2009, : 459 - 466
- [46] A Hybrid Chaos-AES Encryption Algorithm and Its Impelmention Based on FPGA 2014 IEEE 12TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2014, : 217 - 220
- [47] Side-Channel Analysis of a High-Throughput AES Peripheral with Countermeasures 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC), 2014, : 25 - 29
- [48] Countermeasures against EM Analysis for a Secured FPGA-based AES Implementation 2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2013,
- [49] Correlated Power Noise Generator as a Low Cost DPA Countermeasures to Secure Hardware AES Cipher 2009 3RD INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS (SCS 2009), 2009, : 341 - +
- [50] Lightweight Implementation of the AES Encryption Algorithm for IoT Applications Constrained by Memory and Processing Power 2024 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS, AQTR, 2024, : 35 - 40