High-speed ultra-compact all-optical NOT and AND logic gates designed by a multi-objective particle swarm optimized method

被引:22
|
作者
Lu, Qichao [1 ]
Yan, Xin [1 ]
Wei, Wei [2 ]
Zhang, Xia [1 ]
Zhang, Mingqian [3 ]
Zheng, Jiahui [1 ]
Li, Bang [1 ]
Luo, Yanbin [1 ]
Lin, Qimin [1 ]
Ren, Xiaomin [1 ]
机构
[1] Beijing Univ Posts & Telecommun, State Key Lab Informat Photon & Opt Commun, Beijing 100876, Peoples R China
[2] Guangzhou Univ, Sch Mech & Elect Engn, Guangzhou 510006, Guangdong, Peoples R China
[3] China Acad Space Technol, Qian Xuesen Lab Space Technol, Beijing 100094, Peoples R China
来源
基金
中国国家自然科学基金;
关键词
Multi-objective particle swarm optimization; Logic gates; Robustness; SOI; FDTD; PHOTONIC CRYSTAL; INVERSE DESIGN; CIRCUIT;
D O I
10.1016/j.optlastec.2019.03.032
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
We have designed high-speed ultra-compact all-optical NOT and AND gates operating at 1550 nm on silicon-on-insulator (SOI) by a multi-objetice particle swarm optimized inverse-design method. The two gates have a similar four-port structure based on an extremely small area of 1.2 x 1.2 mu m(2). The ultra-small size of device leads to a short respond time less than 0.25 ps. Benefiting from the global optimization of our inverse-design method, our devices have a good tolerance on phase changes of input light. The not gate could keep working while the phase difference of input ranges from 0 to 0.3 pi. The situation for AND gate is -0.25 to 0.75 pi. Also the maximum contrast ratio is 7.16 dB for the NOT gate and 3.98 for the AND gate, respectively. Moreover, we demonstrate that the design method could have tolerance for small changes in device geometry, which means that our logic gates could remain functional while the pixel side length ranges from 112 to 125 nm. The tiny size, fast response and high robustness make our devices promising for future photonic-integrated circuits.
引用
收藏
页码:322 / 327
页数:6
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