Simulation of the RRAM-based Flip-Flops with Data Retention

被引：0

作者：

Li, Mu ^{[1
]}

Huang, Peng ^{[2
]}

Shen, Lei ^{[2
]}

Zhou, Zheng ^{[2
]}

Kang, Jin-Feng ^{[2
]}

Liu, Xiao-Yan ^{[2
]}

机构：

[1] Peking Univ, Shenzhen Grad Sch, Shenzhen, Peoples R China

[2] Peking Univ, Inst Microelect, Beijing, Peoples R China

来源：

7TH IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC) 2016 | 2016年

关键词：

RRAM; non-volatile; flip-flop; IoT; 1T1R; SPICE; MODEL;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A RRAM-based non-volatile flip-flop (NVFF) is designed to meet energy efficiency requirement for standby-power-critical applications in the deployment solution of IoT (Internet of Things). Adding only a pair of 1T1R cell into slave latch of a traditional FF can cut off the standby leakage at the cost of 4pJ write energy, and 20ps data retention time upon ideal power-on. The NVFF circuit is simulated and analyzed in HSPICE with a SPICE compact model of oxide-based RRAM on the conductive filament evolution model.

引用

页数：2

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