Analog integrated circuits for the Lotka-Volterra competitive neural networks

被引:39
|
作者
Asai, T [1 ]
Ohtani, M [1 ]
Yonezu, H [1 ]
机构
[1] Toyohashi Univ Technol, Dept Elect & Elect Engn, Aichi 4418580, Japan
来源
IEEE TRANSACTIONS ON NEURAL NETWORKS | 1999年 / 10卷 / 05期
关键词
analog integrated circuits; neural-network hardware; winner-take-all; winners-share-all;
D O I
10.1109/72.788661
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A subthreshold MOS integrated circuit (IC) is designed and fabricated for implementing a competitive neural network of the Lotka-Volterra (LV) type which is derived from conventional membrane dynamics of neurons and is used for the selection of external inputs, The steady-state solutions to the LV equation can be classified into three types, each of which represents qualitatively different selection behavior. Among the solutions, the winners-share-all (WSA) solution in which a certain number of neurons remain activated in steady states is particularly useful owing to robustness in the selection of inputs from a noisy environment. The measured results of the fabricated LV IC's agree well with the theoretical prediction as long as the influence of device mismatches is small. Furthermore, results of extensive circuit simulations prove that the large-scale LV circuit producing the WSA solution does exhibit a reliable selection compared with winner-take-ah circuits, in the possible presence of device mismatches.
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页码:1222 / 1231
页数:10
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