Switch-mode power amplifier linearization

A continuous time band-pass delta sigma modulator was designed and fabricated in a 0.18 mu m SiGe BiCMOS process. This IC was designed to accept an analog intermediate frequency input up to 100 MHz. A synchronous clocking scheme was incorporated to perform frequency translation, in addition to quantization, inside the modulator loop. The modulator was inserted into a closed loop system that also contained multiple stages of broadband switching amplifiers in cascade, to demonstrate linearization viability. Greater than 20 dB of linearization was achieved on multi-carrier CDMA 2000 and WCDMA patterns, both at 874 MHz and 2.14 GHz.