Adding synchronous and LSSD modes to asynchronous circuits

被引：0
|
作者：
van Berkel, K [1 ]
Peeters, A [1 ]
te Beest, F [1 ]
机构：
[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands
来源：
ASYNC: EIGHTH INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS, PROCEEDINGS | 2002年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rules. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.
引用
收藏
页码：161 / 170
页数：10
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