Accurate modeling and estimation of 3-D power network electrical performance are vitally important to aid 3-D integration and packaging design. This paper, for the first time, combines the electromagnetic (EM) simulation program with integrated circuit emphasis simulations to evaluate the electrical performance of a 3-D power network, which consists of Cu through-silicon-vias (TSVs), solders, micro-solders, and on-chip power grids. We intentionally partition a real stack-up structure of 3-D power network into separated components, electromagnetically extract all the passive elements resistance, inductance, conductance, and capacitance (RLGC) for each component at certain frequency points of interest. We then assemble all the components again into a corresponding equivalent circuit model and import EM-extracted RLGC values to analyze the overall 3-D system power performance. The number of stacked integrated circuits, floorplanning of TSVs/micro-solders, operating frequency of 3-D system, characteristics of decoupling capacitance, size of on-chip power grids, parasitics of power wires/vias/solders/TSVs/microsolders, voltage supply, and waveform parameters of current loads are examined, unveiling several 3-D power delivery design implications.