Manufacturability of low power CMOS technology solutions

被引：0

作者：

Strojwas, AJ ^{[1
]}

Quarantelli, M ^{[1
]}

Borel, J ^{[1
]}

Guardiani, C ^{[1
]}

Nicollini, G ^{[1
]}

Crisenza, G ^{[1
]}

Franzini, B ^{[1
]}

Wiart, J ^{[1
]}

机构：

[1] CARNEGIE MELLON UNIV,DEPT ELECT & COMP ENGN,PITTSBURGH,PA 15213

来源：

1996 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - DIGEST OF TECHNICAL PAPERS | 1996年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：225 / 232

页数：8

共 50 条

[41] Improved Poly Gate Engineering for 65 nm Low Power CMOS Technology
Hu, Chan-Yuan
Chen, Jone F.
Chen, Shih-Chih
Chang, Shoou-Jinn
Lee, Chih-Ping
Lee, T. H.
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2010, 157 (01) : H38 - H43
[42] A low-power cryogenic analog to digital converter in standard CMOS technology
Zhao, Hongliang
Liu, Xinghui
CRYOGENICS, 2013, 55-56 : 79 - 83
[43] A low-power oscillator mixer in 0.18-μm CMOS technology
Wang, TP
Chang, CC
Liu, RC
Tsai, MD
Sun, KJ
Chang, YT
Lu, LH
Wang, H
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2006, 54 (01) : 88 - 95
[44] HMOS-CMOS - A LOW-POWER HIGH-PERFORMANCE TECHNOLOGY
YU, K
CHWANG, RJC
BOHR, MT
WARKENTIN, PA
STERN, S
BERGLUND, CN
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1981, 16 (05) : 454 - 459
[45] A Low Power CMOS Technology Compatible Non-volatile SRAM Cell
Wang, Lina
Wang, Jinhui
Yang, Zezhong
Hou, Ligang
Gong, Na
2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2014,
[46] RF Modeling of 45nm Low-Power CMOS Technology
Wang, Jing
Li, Hongmei
Pan, Li-Hong
Gogineni, Usha
Groves, Robert
Jagannathan, Basanth
Na, Myung-Hee
Tonti, William
Wachnik, Richard
NANOTECH CONFERENCE & EXPO 2009, VOL 3, TECHNICAL PROCEEDINGS: NANOTECHNOLOGY 2009: BIOFUELS, RENEWABLE ENERGY, COATINGS FLUIDICS AND COMPACT MODELING, 2009, : 628 - +
[47] NOVEL, LOW POWER, NONLINEAR DILATATION AND EROSION FILTERS REALIZED IN THE CMOS TECHNOLOGY
Dlugosz, Rafal
Rydlewski, Andrzej
Talaska, Tomasz
FACTA UNIVERSITATIS-SERIES ELECTRONICS AND ENERGETICS, 2015, 28 (02) : 237 - 249
[48] Accurate low power bandgap voltage reference in 0.5 μm CMOS technology
Sanduleanu, MAT
van Tuijl, AJM
Wassenaar, RF
ELECTRONICS LETTERS, 1998, 34 (10) : 1025 - 1026
[49] Managing annealing pattern effects in 45 nm low power CMOS technology
Morin, P.
Cacho, F.
Beneyton, R.
Dumont, B.
Colin, A.
Bono, H.
Villaret, A.
Josse, E.
Bianchini, R.
SOLID-STATE ELECTRONICS, 2010, 54 (09) : 897 - 902
[50] Low Power Balun Design for 1.575 GHz in 90 nm CMOS Technology
Gradzki, Jacek
2012 IEEE 15TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS), 2012, : 250 - 253

← 1 2 3 4 5 →