Process and temperature compensation in a 7-MHz CMOS clock oscillator

被引:158
|
作者
Sundaresan, K [1 ]
Allen, PE [1 ]
Ayazi, F [1 ]
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
关键词
process compensation; ring oscillators; temperature compensation;
D O I
10.1109/JSSC.2005.863149
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper reports on the design and characterization of a process, temperature and supply compensation technique for a 7-MHz clock oscillator in a 0.25-mu m, two-poly five-metal (2P5M) CMOS process. Measurements made across a temperature range of -40 degrees C to 125 degrees C and 94 samples collected over four fabrication runs indicate a worst case combined variation of +/- 2.6%.(With process, temperature and supply). No trimming was performed on any of these samples. The oscillation frequencies of 95% of the samples were found to fall within 0.5% of the mean frequency and the standard deviation was 9.3 kHz. The variation of frequency with power supply was 0.31% for a supply voltage range of 2.4-2.75 V. The clock generator is based on a three-stage differential ring oscillator. The variation of the frequency of the oscillator with temperature and process has been discussed and an adaptive biasing scheme incorporating a unique combination of a process corner sensing scheme and a temperature compensating network is developed. The biasing circuit changes the control voltage of the differential ring oscillator to maintain a constant frequency. A comparator included at the output stage ensures rail-to-rail swing. The oscillator is intended to serve as a start-up clock for micro-controller applications.
引用
收藏
页码:433 / 442
页数:10
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