Educational platform for developing high-performance sensor nodes around a DSP core

被引:0
|
作者
Nicolae, Maximilian [1 ]
Dobrescu, Radu [1 ]
Popescu, Dan [1 ]
机构
[1] Univ Politehn Bucuresti, Fac Control & Comp, 313 Splaiul Independentei, Bucharest, Romania
关键词
Mobile Sensor Networks; digital signal processor; Harvard architecture; Direct Memory Access; audio codec; wireless infrastructure;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The paper presents an architecture of a wireless sensor node on which students can develop high-performance applications for ubiquitous sensor networks. A digital signal processor (DSP) was used for signal processing, an audio codec for data acquisition and a 802.11 g wireless access point for communication. The entire network Was approached initially as a Voice over IP (VoIP) mobile network, yet the information exchanged wasn't voice but measures and commands with Quality of Service (QoS) inherited from VoIP. The usage of mature technologies of audio codecs and wireless LANs assured a high performance and cost efficient solution for mobile sensor networks. The platform's modularity and flexibility allow its usage for many applicative didactical activities and also in research, as logistic support for developing complex projects.
引用
收藏
页码:124 / +
页数:2
相关论文
共 50 条
  • [41] Serpens: A High-Performance Serverless Platform for NFV
    Shen, Junxian
    Yu, Heng
    Zheng, Zhilong
    Sun, Chen
    Xu, Mingwei
    Wang, Jilong
    2020 IEEE/ACM 28TH INTERNATIONAL SYMPOSIUM ON QUALITY OF SERVICE (IWQOS), 2020,
  • [42] A High-Performance Communication Platform for Ultrasonic Applications
    Wang, Boyang
    Saniie, Jafar
    Bakhtiari, Sasan
    Heifetz, Alexander
    2018 IEEE INTERNATIONAL ULTRASONICS SYMPOSIUM (IUS), 2018,
  • [43] Performance Analysis of Signal Processing Algorithms Using Multi-Core DSP Platform
    Sapla, Emrah
    Gemici, Omer Faruk
    Hokelek, Ibrahim
    2018 26TH SIGNAL PROCESSING AND COMMUNICATIONS APPLICATIONS CONFERENCE (SIU), 2018,
  • [44] APPLICATION-SPECIFIC PROCESSOR BRINGS HIGH-PERFORMANCE TO DSP
    MARRIN, K
    COMPUTER DESIGN, 1986, 25 (14): : 30 - &
  • [45] Optimal chip-package codesign for high-performance DSP
    Mehrotra, P
    Rao, V
    Conte, TM
    Franzon, PD
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2005, 28 (02): : 288 - 297
  • [46] High-performance FFT implementation on the BOPS ManArray parallel DSP
    Pitsianis, NP
    Pechanek, G
    ADVANCED SIGNAL PROCESSING ALGORITHMS, ARCHITECTURES,AND IMPLEMENTATIONS IX, 1999, 3807 : 164 - 171
  • [47] A high-performance DSP controlled resonant-commutated converter
    Chickamenahalli, SA
    Ahmed, M
    APEC '98 - THIRTEENTH ANNUAL APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1 AND 2, 1998, : 329 - 334
  • [48] OPTIMIZING AND SCHEDULING DSP PROGRAMS FOR HIGH-PERFORMANCE VLSI DESIGNS
    MACIEL, FB
    MIYANAGA, Y
    TOCHINAI, K
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1992, E75A (10) : 1191 - 1201
  • [49] A Multi-DSP System for High-Performance Video Applications
    Xiaoshen, Xu
    Hongxu, Jiang
    Liang, Jin
    Dandan, Lei
    Bo, Li
    2008 11TH IEEE SINGAPORE INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS (ICCS), VOLS 1-3, 2008, : 778 - 782
  • [50] Developing high-performance hybrid green composites
    Hassanin, Ahmed H.
    Hamouda, Tamer
    Candan, Zeki
    Kilic, Ali
    Akbulut, Turgay
    COMPOSITES PART B-ENGINEERING, 2016, 92 : 384 - 394