On the Impact of Performance Faults in Modern Microprocessors

被引:2
|
作者
Karimi, Naghmeh [1 ]
Maniatakos, Michail [2 ]
Tirumurti, Chandrasekharan [3 ]
Makris, Yiorgos [4 ]
机构
[1] NYU, ECE Dept, Polytech Inst, Brooklyn, NY 11201 USA
[2] New York Univ, ECE Dept, Abu Dhabi, U Arab Emirates
[3] Intel Corp, SoC Enabling Grp, Santa Clara, CA 95050 USA
[4] Univ Texas Dallas, EE Dept, Richardson, TX 75080 USA
关键词
Modern microprocessors; Performance faults; Architectural features; Performance loss recovery; Yield enhancement;
D O I
10.1007/s10836-013-5360-5
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Modern microprocessors incorporate a variety of architectural features, such as branch prediction and speculative execution, which are not critical to the correctness of their operation yet are essential towards improving performance. Accordingly, while faults in the corresponding hardware may not necessarily affect functional correctness, they may, nevertheless, adversely impact performance. In this paper, we investigate quantitatively the performance impact of such faults using a superscalar, dynamically-scheduled, out-of-order, Alpha-like microprocessor, on which we execute SPEC2000 integer benchmarks. We provide extensive fault simulation-based experimental results that elucidate the various aspects of performance faults and we discuss how this information may guide the inclusion of additional hardware for performance loss recovery and yield enhancement.
引用
收藏
页码:351 / 366
页数:16
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