Faster-Than-Real-Time Linear Lane Detection Implementation Using SoC DSP TMS320C6678

被引:0
|
作者
Fan, Rui [1 ]
Prokhorov, Victor [1 ]
Dahnoun, Nairn [1 ]
机构
[1] Univ Bristol, Dept Elect & Elect Engn, Bristol BS8 1UB, Avon, England
关键词
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中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Lane Detection (LD) systems are now commonly used in autonomous cars to assist drivers. However, LD takes up only a small part of the Advanced Driver Assistant Systems (ADAS) and should be highly optimised to make more room for other more complicated algorithms such as stereo vision systems that are incorporated into an ADAS. This paper mainly focuses on an optimised implementation of the linear lane detection system based on multiple image pre-processing methods and an efficient Hough transform (HT). To evaluate the performance of the algorithm, it was implemented on the TMS320C6678 System on Chip (SoC) Digital Signal Processor (DSP). The proposed algorithm is programmed in C language, which is compatible across multiple platforms especially for DSP to achieve a much faster performance than real-time. In order to reduce the noise in the HT accumulator and decrease the processing time, a Gaussian blur, edge thinning and border suppression were used. These gave not only an increase of 92.8% in performance but also a detection rate increase of 33.7%. To enhance the performance further and make use of all the cores of the SoC, the complete system has been implemented with Open Multi-Processing (OpenMP). This gave a further increase of 76.7% when an appropriate load distribution was used. On the implementation side, the accumulator size was reduced by around 35.5% which is an important factor for an embedded system. Experimental results showed that the system achieved a high performance of 81 fps on images with the resolution of 1242 by 375.
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页码:306 / 311
页数:6
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