Design of Energy-Efficient Discrete Cosine Transform using Pruned Arithmetic Circuits

被引：0

作者：

Schlachter, Jeremy ^{[1
]}

Camus, Vincent ^{[1
]}

Enz, Christian ^{[1
]}

机构：

[1] Ecole Polytech Fed Lausanne, Integrated Circuits Lab ICLAB, CH-1015 Lausanne, Switzerland

来源：

2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2016年

关键词：

Approximate computing; inexact circuits; pruning; DCT; LOW-POWER;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Inexact circuits and approximate computing have been gaining a lot of interest in order to improve performances and energy efficiency beyond the boundaries of conventional digital circuits. Image and video processing is one of the best candidate for applying such techniques. As one of the key building blocks, Discrete Cosine Transform (DCT) accelerators are investigated using pruned arithmetic circuits. A design methodology is presented in order to optimize both image quality and circuit performances. This work demonstrates that with such technique, savings are possible not only on arithmetic units, but in the entire accelerator hardware. Simulations show up to 12% area and 10% power savings with less than 20 dB PSNR degradation compared to the conventional DCT design.

引用

页码：341 / 344

页数：4

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