A simulation environment for pipelined analog-to-digital converters

This paper describes a detailed functional simulator for the design and characterization of single and parallel pipelined analog-to-digital converters. It is a user-friendly program which allows the user to specify the A/D parameters and thus target a particular architecture. Since high resolution is achieved by error correction algorithms, digital self-calibration is also incorporated. Modular design allows the user to replace any component model with more complex modules as demanded by the application. The environment also has the capability to perform single and double tone testing to determine the spurious free dynamic range of the ADC being considered. Since simulation of architectures at the functional level is fast and easy as opposed to a generalized mathematical package, the design cycle time is reduced considerably.