A Flash ADC with low offset dynamic Comparators

被引：0

作者：

Liu, Jia ^{[1
]}

Li, Fule ^{[1
]}

Li, Weitao ^{[1
]}

Jiang, Hanjun ^{[1
]}

Wang, Zhihua ^{[1
]}

机构：

[1] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China

来源：

2017 INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2017年

关键词：

dynamic comparators; offset cancellation; flash;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a Flash ADC with low offset dynamic comparators using an offset cancellation technique. By dynamically storing the comparator offset on the input capacitors, the offset is suppressed mostly. Two 5-bit 160MS/s Flash ADCs (Flash-A using the proposed offset cancellation technique and Flash-B without cancellation) are fabricated in 65nm CMOS for comparison. The measure results show that, the DNL is reduced from 1.32LSB to 0.62LSB and the INL is reduced from 1.20LSB to 0.55LSB. The SNDR improves from 26.25dB to 29.63dB and the SFDR improves from 35.02dB to 43.61dB. And the power increases from 3.44 mW to 3.79 mW.

引用

页数：2

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