Improved Residual Resampling Algorithm and Hardware Implementation for Particle Filters

In this paper, an improved residual resampling (RR) algorithm and hardware architecture for efficient hardware implementation of particle filters (PFs) is proposed. By rounding the accumulated product of the particle non-normalized weight and the number of particles, the proposed improved RR algorithm avoids the resampling of the residuals and thus has only one loop. Mathematical analysis and simulation results confirm that the proposed algorithm can guarantee the number of resampled particles correct and show approximately equal performance with the traditional systematic resampling (SR) and residual systematic resampling (RSR) algorithms. Compact hardware architecture for the proposed resampling is presented and the bearings-only tracking (BOT) problem is used for illustration and evaluation. Experimental results indicate that this hardware architecture is efficient in terms of low resource usage and low latency.