共 50 条
- [1] Sequential Circuit Test Generation Using a Symbolic/Genetic Hybrid Approach [J]. Journal of Electronic Testing, 2001, 17 : 321 - 330
- [2] Combining symbolic and genetic techniques for efficient sequential circuit test generation [J]. IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS, 2000, : 105 - 110
- [3] PGEN: A novel approach to sequential circuit test generation [J]. VLSI DESIGN, 1996, 4 (03) : 149 - 165
- [4] A test generation approach for non-synchronous sequential circuit [J]. ICEMI 2005: Conference Proceedings of the Seventh International Conference on Electronic Measurement & Instruments, Vol 1, 2005, : 475 - 480
- [5] An approach to symbolic test generation [J]. INTEGRATED FORMAL METHODS, PROCEEDINGS, 2000, 1945 : 338 - 357
- [6] Sequential circuit test generation using dynamic state traversal [J]. EUROPEAN DESIGN & TEST CONFERENCE - ED&TC 97, PROCEEDINGS, 1997, : 22 - 28
- [7] Sequential circuit test generation using dynamic justification equivalence [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 1996, 8 (01): : 9 - 33
- [8] Sequential circuit test generation using decision diagram models [J]. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS, 1999, : 736 - 740
- [9] Parallel genetic algorithms for simulation-based sequential circuit test generation [J]. TENTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1997, : 475 - 481
- [10] Study on automatic test generation of sequential circuit using ant algorithm [J]. ICEMI'2001: FIFTH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT AND INSTRUMENTS, VOL 1, CONFERENCE PROCEEDINGS, 2001, : 74 - 78