Evaluation of Buffer Organizations for Network-on-Chip

被引：0

作者：

Jing, Ming'e ^{[1
]}

Ren, Pengshuai ^{[1
]}

Zhou, Weichao ^{[1
]}

Yu, Zhiyi ^{[1
]}

Zeng, Xiaoyang ^{[1
]}

机构：

[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China

来源：

2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012) | 2012年

关键词：

Network-on-chip (NoC); Buffer size; Virtual channel; Packet size; Throughput; Latency;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Network-on-chip (NoC) is becoming increasingly important in designing a system with a large number of modules. Among many important issues, buffer organization of router is one of the most critical issues since it determines the area of the routers, and also affects the system performance significantly. In this paper, we evaluate and compare the NoC performance for several different allocations of virtual channels and channel buffer sizes under fixed buffer resources, to guide the design of buffer organization The experiment results reveal that moderate number of virtual channels is optimal.

引用

页码：1403 / 1405

页数：3

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