Delaunay-Voronoi modeling of power-ground planes with source port correction

被引:33
|
作者
Wu, Kai-Bin [1 ,2 ]
Shiue, Guang-Hwa [3 ]
Guo, Wei-Da [1 ,2 ]
Lin, Chien-Min [4 ]
Wu, Ruey-Beei [1 ,2 ]
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
[2] Natl Taiwan Univ, Grad Inst Commun Engn, Taipei 10617, Taiwan
[3] Chung Yuan Christian Univ Sci & Technol, Chungli 32023, Taiwan
[4] Taiwan Semicond Mfg Co Ltd, Backend Technol Dev Div, Hsinchu 30077, Taiwan
来源
关键词
Delaunay triangular mesh; plane impedance; power distribution network; SPICE-compatible model; via effect; virtual port; Voronoi tessellation;
D O I
10.1109/TADVP.2008.920326
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
An efficient Delaunay-Voronoi modeling of the power-ground planes suitable directly for SPICE compatibity is proposed to deal with the ground bounce noise and decoupling capacitors placement problems for the high-speed digital system designs. The model consists of virtual ports and triangular meshes with the lumped circuit elements, in which all the element values can be related to the mesh geometry shape by the analogy between the circuit equations and Maxwell's equations. Since the analogy fails to apply due to the singular fields near the input/output pins, the via effect of driving and sensing ports is not negligible and an analytical expression from the Hankel function is thus presented for the correction term. A simple rule has been investigated for the model with minimum lumped circuit elements to accurately represent the power-ground planes over the frequency range of interests. The full-wave simulation and measurement results verify the good correlations with the proposed models for the impedance responses of regular and defective plane shapes.
引用
收藏
页码:303 / 310
页数:8
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