LOW-COST CMOS COMPATIBLE SINTERED POROUS SILICON TECHNIQUE FOR MICROBOLOMETER MANUFACTURING

被引：0

作者：

Etter, D. B. ^{[1
]}

Zimmermann, M. ^{[1
]}

Ferwana, S. ^{[1
]}

Hutter, F. X. ^{[1
]}

Burghartz, J. N. ^{[1
]}

机构：

[1] Inst Mikroelekt IMS Chips, Stuttgart, Germany

来源：

2012 IEEE 25TH INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS (MEMS) | 2012年

关键词：

PERFORMANCE;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper reports about the development of a low-cost, CMOS compatible process technology to create thermally insulated pixel regions for integrated microbolometers. The enabling technology is based on a modified sintered porous silicon (sPS) technique. An array of 280 x 240 thermally isolated pixels with lateral dimensions of 30 x 30 mu m(2) and epitaxial silicon (Si) thickness down to 500 nm is presented. In the final design the pixel is suspended by silicon dioxide (SiO2) arms. The design and fabrication process is described and mechanical deformation properties subtracted from profilometer images are presented.

引用

页数：4

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