Measurement of Side-Channel Information from Cryptographic Devices on Security Evaluation Platform: Demonstration of SPACES Project

被引:0
|
作者
Endo, Sho [1 ]
Hayashi, Yu-ichi [1 ]
Homma, Naofumi [1 ]
Aoki, Takafumi [1 ]
Katashita, Toshihiro [2 ]
Hori, Yohei [2 ]
Sakiyama, Kazuo [3 ]
Nagata, Makoto [4 ]
Danger, Jean-Luc [5 ]
Le, Thanh-Ha [6 ]
Sabet, Pirouz Bazargan [7 ]
机构
[1] Tohoku Univ, Grad Sch Informat Sci, Sendai, Miyagi 980, Japan
[2] Natl Inst Adv Ind Sci & Technol, Tokyo, Japan
[3] Univ Electrocommun, Chofu, Tokyo, Japan
[4] Kobe Univ, Kobe, Hyogo, Japan
[5] Telecom ParisTech, Paris, France
[6] Morpho, Paris, France
[7] Paris VI Univ, Paris, France
关键词
SPACES project; Security evaluation platform; On-chip glitchy-clock generator; Fault attacks; RSA; FAULT ATTACKS;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The SPACES project is a Japanese-French joint research project that aims to establish a new security evaluation methodology for cryptographic devices. We introduce one of the SPACES project outcomes associated with the development of the security evaluation platform for cryptographic devices. The new feature of the proposed system is to include a newly-developed Side-channel Attack Standard Evaluation Board (SASEBO) and a fault -injection module based on a glitchy-clock generator implemented in an FPGA on the SASEBO. We also show that we can efficiently collect and analyze the side-channel information with the proposed system.
引用
收藏
页码:313 / 316
页数:4
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