Ultra-high-speed CMOS interface technology

被引:0
|
作者
Matsubara, S [1 ]
Ishida, H [1 ]
Gotoh, K [1 ]
机构
[1] Fujitsu Labs Ltd, Nakahara Ku, Kawasaki, Kanagawa 211, Japan
来源
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Enhancing the performance of the broadband Internet and the performance of computer and storage systems requires high-bandwidth networks to interconnect these systems. Fujitsu has already marketed high-speed network interface products such as the 10 G Ethernet and has recently developed a CMOS interface that accommodates high-speed data transfer at 6.4 Gb/s per signal line to increase network bandwidth. For this interface, we have developed a multi-tap pre-emphasis function for the transmitter and an adaptive equalizer for the receiver that can compensate for a high-frequency transmission loss of 20 dB or more in the backplane of devices and in cables that interconnect cabinets. When this CMOS interface is mounted on a system-on-a-chip (SoC) as a multi-channel interface, the system bandwidth can be upgraded significantly. This paper describes an ultra-high-speed CMOS interface that was manufactured experimentally using Fujitsu's 0.11 mu m CMOS process.
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收藏
页码:200 / 205
页数:6
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