A 2-GHz ROM-Less Direct Digital Frequency Synthesizer Based on an Analog Sine-Mapper Circuit

This paper presents a ROM-less direct digital frequency synthesizer (DDFS) based on an analog-sine-mapping technique with a maximum operating frequency of 2 Gllz. The DDFS with 9 bits of phase resolution and 8 bits of amplitude resolution is capable of producing a minimum spurious-free dynamic range (SFDR) of 42 dBc up to Nyquist frequency at the clock frequency of 2 GHz. The DDFS is designed and simulated under TSMC 0.18-mu m CMOS process. For a 1 VP-P sinusoidal output, the power consumption of the DDFS is 33 mW from a 1.8 V voltage source.