Compact Model of Drain Current in Short-Channel Triple-Gate FinFETs

被引：37

作者：

Fasarakis, Nikolaos ^{[1
]}

Tsormpatzoglou, Andreas ^{[1
]}

Tassis, Dimitrios H. ^{[1
]}

Pappas, Ilias ^{[1
]}

Papathanasiou, Konstantinos ^{[1
]}

Bucher, Matthias ^{[2
]}

Ghibaudo, Gerard ^{[3
]}

Dimitriadis, Charalabos A. ^{[1
]}

机构：

[1] Aristotle Univ Thessaloniki, Thessaloniki 54124, Greece

[2] Tech Univ Crete, Dept Elect & Comp Engn, Khania 73100, Greece

[3] MINATEC, IMEP LAHC Lab, F-38016 Grenoble, France

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2012年 / 59卷 / 07期

关键词：

Drain-current modeling; nanoscale finFETs; THRESHOLD VOLTAGE MODEL; DESIGN; PERFORMANCE; RESISTANCE; SIMULATION; MOSFETS;

D O I：

10.1109/TED.2012.2195318

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analytical compact drain current model for undoped (or lightly doped) short-channel triple-gate fin-shaped field-effect transistors (finFETs) is presented, taking into account quantum-mechanical and short-channel effects such as threshold-voltage shifts, drain-induced barrier lowering, and subthreshold slope degradation. In the saturation region, the effects of series resistance, surface roughness scattering, channel length modulation, and saturation velocity were also considered. The proposed model has been validated by comparing the transfer and output characteristics with device simulations and with experimental results. The good accuracy and the symmetry of the model make it suitable for implementation in circuit simulation tools.

引用

页码：1891 / 1898

页数：8

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