Message Concealment System of Voice Signals Implemented on FPGA

This work introduces the architecture and the implementation on FPGA of a system which realizes the message concealment of voice signals, hiding it in an apparent noise coming from their own wavelet components of the signal. The output of the system appears as a noisy signal in which the original message cannot be recognized. This system can be applied to analog or digital systems for voice transmission, as well as to digital recording systems which require concealment of the relevant information. The system introduced in this work is different of steganographic systems, because this system uses the wavelet components of signal in order to conceal the message of the signal in itself. The voice coder system and voice decoder system were implemented and tested using the FPGA design platform SPARTAN 3AN starter kit, using 30% of resources of the FPGA. Voice coder and voice decoder systems both operate in real time, exhibiting a delay because a latency of 6.2 ms, when operate with a data input rate of 10000 samples/s.