On-Chip Communication Energy Reduction Through Reliability Aware Adaptive Voltage Swing Scaling

被引:10
|
作者
Mineo, Andrea [1 ]
Palesi, Maurizio [2 ]
Ascia, Giuseppe [1 ]
Pande, Partha Pratim [3 ]
Catania, Vincenzo [1 ]
机构
[1] Univ Catania, Dipartimento Ingn Elettr Elettron & Informat, I-95125 Catania, Italy
[2] Kore Univ Enna, I-94100 Enna, Italy
[3] Washington State Univ, Pullman, WA 99163 USA
关键词
Data encoding; link power reduction; low power; network on chip (NoC); power analysis; probabilistic CMOS; NETWORKS; ARCHITECTURES; SCHEMES; DESIGN;
D O I
10.1109/TCAD.2016.2524556
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In a multi/many-core system, the network-on-chip (NoC)-based communication backbone is responsible for a relevant fraction of the overall energy budget. Reducing the voltage swing for signaling in crossbars and links results in significant energy saving. Unfortunately, as voltage swing reduces, the bit error rate increases, that in turn compromises the communication reliability. Starting from the assumption that not all the communications need same level of reliability, in this paper we propose techniques and architectures for run-time tuning of the voltage swing of the crossbars and interrouter links. The proposed technique is compared with the state of the art in link energy reduction through data encoding under both synthetic and real traffic scenarios. We found that the proposed techniques allow to significantly reduce the energy consumption of the NoC fabric without degrading the performance metrics. Energy savings ranging from 20% to 43% have been observed without any relevant impact on the performance metrics.
引用
收藏
页码:1769 / 1782
页数:14
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