A Parallel Architecture for Ray-Tracing

被引:0
|
作者
Nery, Alexandre S. [1 ]
Nedjah, Nadia [2 ]
Franca, Felipe M. G. [1 ]
机构
[1] Univ Fed Rio de Janeiro, COPPE, Syst Engn & Comp Sci Program, LAM Comp Architecture & Microeletron Lab, BR-21941 Rio De Janeiro, Brazil
[2] Univ Estado Rio de Janeiro, Fac Engn, Dept Elect Engn & Telecommun, Rio De Janeiro, Brazil
关键词
Ray-tracing; architecture; parallelism; fpga;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Real time rendering of three-dimensional scenes in high photorealistic detail is a hard task, such as in the Ray Tracing rendering algorithm. However, parallel implementations of Ray Tracing have been enabling real time performance, as the algorithm is embarrassingly parallel. Thus, a custom parallel design in hardware is likely to achieve an acceptable performance. In this paper, we propose a hardware parallel architecture capable of dealing with the main desirable features of Ray Tracing, such as shadows and reflection effects, imposing low area cost and acceptable rendering performance.
引用
收藏
页码:77 / 80
页数:4
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