Mixed-signal fault equivalence: search and evaluation

被引：3
|
作者：
Guerreiro, Nuno [1 ]
Santos, Marcelino [1 ]
机构：
[1] TUL, IST, INESC ID, Lisbon, Portugal
来源：
2011 20TH ASIAN TEST SYMPOSIUM (ATS) | 2011年
关键词：
test; fault model; fault equivalence; analog; mixed-signal;
D O I：
10.1109/ATS.2011.19
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The aim of this paper is to reduce the fault simulation effort required for the evaluation of test effectiveness in mixed-signal circuits. Exhaustive simulation of basic analog and mixed-signal structures in the presence of individual faults is used to identify potentially equivalent faults. Fault equivalence is finally evaluated based on the simulation of all faults in a case study - a DCDC (switched buck converter). The number of transistor stuck-on and stuck-off faults that need to be simulated is reduced to 31% in the structures already processed by the proposed methodology. This approach is a significant contribution to make mixed-signal fault simulation possible as part of the production test preparation.
引用
收藏
页码：377 / 382
页数：6
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