Implementing an Efficient Path Based Equivalence Checker for Parallel Programs

被引：5
|
作者：
Bandyopadhyay, Soumyadip [1 ]
Banerjee, Kunal [2 ,3 ]
机构：
[1] BITS Pilani Goa, CSIS, Sancoale, Goa, India
[2] IIT Kharagpur, Dept Comp Sci & Engn, Kharagpur, W Bengal, India
[3] Intel Parallel Comp Lab, Bangalore, Karnataka, India
来源：
PROCEEDINGS OF THE ACM WORKSHOP ON SOFTWARE ENGINEERING METHODS FOR PARALLEL AND HIGH PERFORMANCE APPLICATIONS (SEM4HPC'16) | 2016年
关键词：
Parallelizing transformations; Equivalence checking; PRES plus model;
D O I：
10.1145/2916026.2916027
中图分类号：
TP31 [计算机软件];
学科分类号：
081202 ; 0835 ;
摘要：
User written programs, when transformed by optimizing and parallelizing compilers, can be incorrect, if the compiler is not trusted. So, establishing the validity of these transformations is a crucial and challenging task. For program verification, the PRES+ (Petri net Representation of Embedded Systems) is now well accepted as a model to capture the data and control flow of a program. In this paper, an efficient path based equivalence checking method using a simple PRES+ model (which is easier to generate from a program) for validating several optimizing and parallelizing transformations is proposed. The experimental results demonstrate the efficiency of the method.
引用
收藏
页码：3 / 10
页数：8
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