Highly Parallel and Fast Implementation of Stereo Vision Algorithms on MIMD Many-Core Tilera Architecture

In this paper we present a fast, and for some cases faster than real-time, implementation of a class of dense stereo vision algorithms including the sum of squared differences (SSD), SSD with left-right check, and SSD with multiple windows, on a low-power MIMD many-core architecture, Tilera. Stereo vision - a method to extract spatial depth information of a scene from two pairs of stereo images - is performed as a primary task and first step in many computer vision applications, e.g. 3D modeling and obstacle detection/avoidance in autonomous vehicles. To reduce the scene conditions in real environment and achieve a robust error rejection, intensive computation for implementing a multiple window with left-right checking scheme is required. Therefore, real-time implementation of these algorithms is a challenging problem, particularly in an embedded application. To the best of our knowledge, our results present the first implementation of any stereo vision algorithm on new emerging MIMD many-core architectures. We have achieved a faster than real-time performance of 207, 118, and 30.45 frames per second for VGA (640x480) images with a disparity range of 16 for standard SSD, SSD with left-right checking, and SSD with 5 multiple window implementations, respectively. For HDTV (1280x720) images, we have achieved rather unique results of 71, and 35.75 frames per second for standard SSD and SSD with left-right checking implementations, respectively. Such excellent performance along with the low power consumption of the Tilera architecture (less than 23W) makes it an excellent candidate to achieve a supercomputing level capability for mobile computer vision applications. Experimental results also clearly demonstrate that the new many-core MIMD parallel architectures can indeed achieve excellent performance in low-level image processing computations while providing a high degree of flexibility and programmability.