Efficient Successive Cancellation Decoder for Polar Codes Based on Frozen Bits

Recently, polar codes have received much attention due to their simple structure and low decoding complexity. However, because of the long decoding latency, polar codes are still not suitable for real-time applications. In this paper, by the analysis of the position of frozen bits and the architecture of conventional SC decoder, we present an efficient SC decoder architecture. Using the proposed architecture, the decoding latency of a polar code with length N can be reduced from N-1 to N/2-1. Also, the proposed architecture can reduce the number of MPEs about 33% compared with conventional SC decoder.