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A High Reliability CMOS Implantable Interface for Wireless Neural Recording Microsystem

被引：0
|
作者：
Li, Hongge [1 ]
Zhang, Youguang [1 ]
机构：
[1] Beijing Univ Aeronaut & Astronaut, Sch Elect Informat Engn, Beijing 100083, Peoples R China
来源：
EDSSC: 2008 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS | 2008年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel wireless implantable microsystem using a high-reliability digital technology is proposed for recording the hybrid neural signal. In order to enhance the neural recording intactness, we employ a kind of high-reliability design architecture, which includes a self-check circuit and a transmitter channel error check circuit. The proposed high-reliability structure can identify possible faults in any implantable interface. A dynamical pattern double channel circuit is designed for the signal synchronous transfer in this interface. A low-power self-check circuit is designed too. The high-reliability and low-power implantable interface using a full-CMOS technology has been designed and verified. A prototype has been implemented, whose correct operation has been verified by mean of post-layout simulations and experimental measurements.
引用
收藏
页码：128 / 131
页数：4
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