A High Reliability CMOS Implantable Interface for Wireless Neural Recording Microsystem

A novel wireless implantable microsystem using a high-reliability digital technology is proposed for recording the hybrid neural signal. In order to enhance the neural recording intactness, we employ a kind of high-reliability design architecture, which includes a self-check circuit and a transmitter channel error check circuit. The proposed high-reliability structure can identify possible faults in any implantable interface. A dynamical pattern double channel circuit is designed for the signal synchronous transfer in this interface. A low-power self-check circuit is designed too. The high-reliability and low-power implantable interface using a full-CMOS technology has been designed and verified. A prototype has been implemented, whose correct operation has been verified by mean of post-layout simulations and experimental measurements.