Comparing the Performance Parameters of Network on Chip with Regular and Irregular Topologies

Scalability and reusability are the critical issues concerning any application. As far as Network on Chip is concerned the above said issues are addressed through generating application specific topologies. Application specific topologies are irregular in structure and take into account certain factors like communication weight, area and energy constraints while building up the topology. Regular topologies like 2D mesh, spidergon etc are more structured and are built not considering much about the system characteristics and other requirements. Consequently the throughput and power utilizations vary depending on the topology. Our aim is to provide a comparative analysis on the performance measures of irregular application specific networks against the regular topological structures.