Analysis of power/ground planes by PCB simulator with model order reduction technique

被引：4
|
作者：
Kubota, H [1 ]
Kamo, A [1 ]
Watanabe, T [1 ]
Asai, H [1 ]
机构：
[1] Shizuoka Univ, Fac Engn, Dept Syst Engn, Hamamatsu, Shizuoka 4328561, Japan
来源：
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING | 2001年
关键词：
D O I：
10.1109/EPEP.2001.967615
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
With the progress of integration of circuits and PCBs (Printed Circuit Boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain the interconnects with nonlinear terminations. This simulator is based on the environmental tool ASSIST constructed for development of the circuit simulators, and is combined with PRIMA (Passive Reduced-Order Interconnect Macromodeling Algorithm). In this simulator, an efficient implementation of PRIMA is considered with using a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of the simple PCBs, and the validity is verified.
引用
收藏
页码：77 / 80
页数：4
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