LOW POWER AND HIGH PERFORMANCE SINGLE-ENDED SENSE AMPLIFIER

被引:3
|
作者
Singh, Ajay Kumar [1 ]
Seong, Mah Meng [1 ]
Prabhu, C. M. R. [1 ]
机构
[1] Multimedia Univ, Fac Engn & Technol, Melaka 75450, Malaysia
关键词
Sense amplifier; power consumption; read bit-line; access time; SRAM cell;
D O I
10.1142/S021812661350062X
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a new power efficient single ended sense amplifier (SA). The proposed circuit is based on the direct current voltage conversion technique. It has been simulated using Microwind3 and DSCH3 tools (advanced BSIM 4 level) for 90 nm CMOS technology in terms of power consumption, sense time and results were compared to other circuits. The proposed SA circuit consumes more than 50% less power and gives 90% faster sensing speed compared to other circuits. The lower power consumption is due to lower leakage current, lower voltage drop on bit-line and faster speed is due to positive feedback of the circuit. The proposed circuit is more robust against any process and temperature variation.
引用
收藏
页数:12
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