The Study and Implementation of the Algorithm of Identifying the PLD Pin Types through On-board Analysis

被引：0
|
作者：
Zhu, Yuanhua [1 ]
Li, Qingbao [1 ]
Xiao, Da [1 ]
机构：
[1] Zhengzhou Inst Informat Sci & Technol, Zhengzhou 450002, Henan, Peoples R China
来源：
2008 INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS SYMPOSIA, PROCEEDINGS | 2008年
关键词：
D O I：
10.1109/ICESS.Symposia.2008.83
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
The premise of achieving the reverse PLD (Programmable Logic Device) analysis is to identify the pin types by adopting the method of on-board analysis. How to rapidly and accurately identify all pin types is the key problem. Based on theoretical analysis to inherent relationships about data changes among various types of pins, a highly efficient fixed rate algorithm is brought out to identify pin types of all kinds of PLDs. According to whether there is the clock pins, the PLDs are divided into combinational PLDs and sequential PLDs. Both the effective and the correct rate of the fixed rate algorithm are higher than the former because it adopts the correct identifying sequence and considers more details
引用
收藏
页码：496 / 501
页数：6
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