A multiple-valued Hopfield network device using single-electron circuits

被引:0
|
作者
Yamada, T [1 ]
Amemiya, Y [1 ]
机构
[1] Hokkaido Univ, Dept Elect Engn, Sapporo, Hokkaido 0608628, Japan
关键词
single electron; Hopfield network; multiple valued;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We developed a method of implementing a multiple-valued Hopfield network on electronic circuits by using single-electron circuit technology. The single-electron circuit shows quantized behavior in its operation because of the discrete tunnel transport of electrons. It can therefore be successfully used for implementing neuron operation of the multiple-valued Hopfield network. The authors developed a single-electron neuron circuit that can produce the staircase transfer function required for the multiple-valued neuron. A method for constructing a multiple-valued Hopfield network by combining the neuron circuits was also developed. A sample network was designed that solves an example of the quadratic integer-programming problem. And a computer simulation demonstrated that the sample network can converge to its optimal state that represents the correct solution to the problem.
引用
收藏
页码:1615 / 1622
页数:8
相关论文
共 50 条
  • [1] Multiple-valued logic devices using single-electron circuits
    Yamada, T
    Amemiya, Y
    SUPERLATTICES AND MICROSTRUCTURES, 2000, 27 (5-6) : 607 - 611
  • [2] A multiple-valued single-electron SRAM by the PADOX process
    Inokawa, H
    Fujiwara, A
    Takahashi, Y
    SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1 AND 2, PROCEEDINGS, 2001, : 205 - 208
  • [3] Multiple-valued Logic Gates using Asymmetric Single-electron Transistors
    Zhang, Wan-cheng
    Wu, Nan-jian
    Hashizume, Tamotsu
    Kasai, Seiya
    ISMVL: 2009 39TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, 2009, : 337 - +
  • [4] Multiple-valued memory operation using a single-electron device: a proposal and an experimental demonstration of a ten-valued operation
    Sunamura, H
    Kawaura, H
    Sakamoto, T
    Baba, T
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 2002, 41 (2A): : L93 - L95
  • [5] Low-Power Multiple-Valued SRAM Logic Cells Using Single-Electron Devices
    Syed, Naila
    Chen, Chunhong
    2012 12TH IEEE CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO), 2012,
  • [6] Quantum Hopfield network using single-electron circuits - A novel Hopfield network free from the local-minimum difficulty
    Akazawa, M
    Tokuda, E
    Asahi, N
    Amemiya, Y
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2000, 24 (01) : 51 - 57
  • [7] Quantum Hopfield Network Using Single-Electron Circuits—A Novel Hopfield Network Free from the Local-Minimum Difficulty
    Masamichi Akazawa
    Eriko Tokuda
    Noburu Asahi
    Yoshihito Amemiya
    Analog Integrated Circuits and Signal Processing, 2000, 24 (1) : 51 - 57
  • [8] Multiple-valued memory operation in SiN-based single-electron memory
    Sunamura, H.
    Kawaura, H.
    Sakamoto, T.
    Baba, T.
    Annual Device Research Conference Digest, 2000, : 153 - 154
  • [9] A SPICE model of realistic single-electron transistors and its application to multiple-valued logic
    Song, KW
    Kim, KR
    Lee, JD
    Park, BG
    Lee, SH
    Kim, DH
    JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 2004, 44 (01) : 121 - 124
  • [10] MULTIPLE-VALUED CCD CIRCUITS
    BUTLER, JT
    KERKHOFF, HG
    COMPUTER, 1988, 21 (04) : 58 - 69