Fault Tolerant Design For Cascaded H-Bridge Multi-level Converter Based Electronic Power Transformer

被引：0

作者：

Sang, Zi-xia ^{[1
]}

Huang, Jia-qi ^{[1
]}

Du, Zhi ^{[1
]}

Zhou, Si-xuan ^{[1
]}

Yan, Jiong ^{[2
]}

Xu, Qiu-shi ^{[2
]}

Lei, He ^{[2
]}

Wang, Si-cong ^{[2
]}

机构：

[1] State Grid Hubei Econ Res Inst, Wuhan, Hubei, Peoples R China

[2] State Grid Lab Hydrothermal Power Resources Optim, Wuhan, Hubei, Peoples R China

来源：

PROCEEDINGS OF THE 2018 13TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS (ICIEA 2018) | 2018年

关键词：

electronic power transformer (EPT); redundancy; fault tolerant strategy; cascaded multi-level converter (CMLC); RECONFIGURATION; SYSTEM;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

As a prospective electric component in the power grid, the reliability of electronic power transformer (EPT) affects the security of the power grid. The fault tolerant strategy about the redundancy control can improve the reliability of EPT, hence secure the power grid. This paper presents the design of fault tolerant strategy on a cascaded multi-level converter (CMLC) based EPT. The operational principle and control scheme for the redundancy control are introduced and analyzed. The proposed fault tolerant strategies are implemented on a single phase ninelevel CMLC based EPT in Saber simulation platform. Simulation is illustrated to verify the performance of the proposed fault tolerant design with redundancy control.

引用

页码：2280 / 2284

页数：5

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