A Continuous-time Input Pipeline ADC

被引：4

作者：

Gubbins, David ^{[1
]}

Lee, Bumha ^{[2
]}

Hanumolu, Pavan Kumar ^{[1
]}

Moon, Un-Ku ^{[1
]}

机构：

[1] Oregon State Univ, Sch EECS, Corvallis, OR 97331 USA

[2] Natl Semicond Corp, Santa Clara, CA USA

来源：

PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2008年

关键词：

D O I：

10.1109/CICC.2008.4672050

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new pipeline ADC architecture that employs a continuous-time first stage followed by a conventional switched capacitor pipeline ADC is presented. Such an approach overcomes many of the challenges associated with a pure switched-capacitor architecture and leads to a low area, low power solution with excellent distortion performance. Measured results obtained from a proof of concept test chip fabricated in a 0.18 mu m CMOS process validate the effectiveness of proposed techniques.

引用

页码：169 / +

页数：2

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