An Energy-Efficient Quaternary Serial Adder for Nanoelectronics

被引:7
|
作者
Sedighiani, Shima [1 ]
Kazemi, Arman [2 ]
机构
[1] Eindhoven Univ Technol, Elect Syst, Elect Engn, Eindhoven, Netherlands
[2] Eindhoven Univ Technol, Eindhoven, Netherlands
关键词
Carbon nanotube FET; Multiple-Valued Logic; Nanoelectronics; Quaternary Logic; TRANSISTORS INCLUDING NONIDEALITIES; WALLED CARBON NANOTUBES; MULTIPLE-VALUED LOGIC; COMPACT SPICE MODEL; DESIGN; GATES;
D O I
10.1109/ISMVL.2018.00016
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Increased power consumption of scaling Complementary Metal Oxide Semiconductor (CMOS) technology and the limitations of binary communication have led to the consideration of non-silicon multiple-valued logic (MVL) circuits. The unique properties of Carbon Nanotube Field Effect Transistors (CNTFETs) in circuit design, such as the capability of setting the desired threshold voltage by adjusting the CNT diameters and the ballistic transport of carriers, make it possible to achieve an effective solution to improve energy efficiency and speed. Quaternary is the closest radix to the optimum (e=2.718) that has the advantage of easy communication with binary logic circuits. This study presents an efficient design of a quaternary serial adder based on CNTFETs. The design exploits an existing high-performance full adder and improves the carry propagation. Simulation results confirm that the proposed quaternary serial adder uses on average 57.8% of the power such an adder requires based on the current state-of-the-art quaternary full adders.
引用
收藏
页码:44 / 49
页数:6
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