Digital Implementation of Constant Power Load (CPL), Active Resistive Load, Constant Current Load and Combinations

被引:0
|
作者
Arora, Sameer [1 ]
Balsara, Poras T. [1 ]
Bhatia, Dinesh K. [1 ]
机构
[1] Univ Texas Dallas, Dept Elect Engn, Richardson, TX 75083 USA
关键词
Digital; Constant Power Load (CPL); Resistive load; Constant current; DSP;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Cascaded converters need to be tightly regulated to have better system performance and faster dynamic response. One of the major issues in cascaded converters is that they behaves as a constant power load (CPL) when tightly regulated. The current through a CPL decreases/increases with the increase/decrease of voltage across it, respectively. As a result, a CPL has negative incremental impedance, which causes a destabilizing effect. In order to study the converter's behavior with constant power load, a novel digital implementation of constant power load is proposed which emulates a DC/DC converter as a CPL. The digital implementation is controlled by a DSP which has the ability to be configured as a CPL, an active resistor load, constant current load or combinations. Further, the load can be dynamically changed.
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页数:4
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