Processing data where it makes sense: Enabling in-memory computation

被引:124
|
作者
Mutlu, Onur [1 ,2 ]
Ghose, Saugata [2 ]
Gomez-Luna, Juan [1 ]
Ausavarungnirun, Rachata [2 ,3 ]
机构
[1] Swiss Fed Inst Technol, Zurich, Switzerland
[2] Carnegie Mellon Univ, Pittsburgh, PA 15213 USA
[3] King Mongkuts Univ Technol North Bangkok, Bangkok, Thailand
基金
美国安德鲁·梅隆基金会;
关键词
Data movement; Main memory; Processing-in-memory; 3D-Stacked memory; Near-data processing;
D O I
10.1016/j.micpro.2019.01.009
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory is already a key bottleneck as applications become more data-intensive and memory bandwidth and energy do not scale well, (2) energy consumption is a key constraint in especially mobile and server systems, (3) data movement is very expensive in terms of bandwidth, energy and latency, much more so than computation. These trends are especially severely-felt in the data-intensive server and energy-constrained mobile systems of today. At the same time, conventional memory technology is facing many scaling challenges in terms of reliability, energy, and performance. As a result, memory system architects are open to organizing memory in different ways and making it more intelligent, at the expense of higher cost. The emergence of 3D-stacked memory plus logic as well as the adoption of error correcting codes inside DRAM chips, and the necessity for designing new solutions to serious reliability and security issues, such as the RowHammer phenomenon, are an evidence of this trend. In this work, we discuss some recent research that aims to practically enable computation close to data. After motivating trends in applications as well as technology, we discuss at least two promising directions for processing-in-memory (PIM): (1) performing massively-parallel bulk operations in memory by exploiting the analog operational properties of DRAM, with low-cost changes, (2) exploiting the logic layer in 3D-stacked memory technology to accelerate important data-intensive applications. In both approaches, we describe and tackle relevant cross-layer research, design, and adoption challenges in devices, architecture, systems, and programming models. Our focus is on the development of in-memory processing designs that can be adopted in real computing platforms at low cost. (C) 2019 Published by Elsevier B.V.
引用
收藏
页码:28 / 41
页数:14
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