A Low-Power Delta-Sigma Modulator Using a Charge-Pump Integrator

被引：18
|
作者：
Nilchi, Alireza [1 ]
Johns, David A. [1 ]
机构：
[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | 2013年 / 60卷 / 05期
基金：
加拿大自然科学与工程研究理事会;
关键词：
ADC; charge-pump integrator; chopper-stabilization; delta-sigma modulator; low-power; oversampling; switched-capacitor; thermal noise limited circuits; SWITCHED-CAPACITOR INTEGRATOR; LOW-VOLTAGE; DESIGN;
D O I：
10.1109/TCSI.2012.2220462
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper a low-power switched-capacitor integrator based on a capacitive charge-pump (CP) is presented, and its practical effects are discussed. The CP integrator is employed as the first stage of a Delta Sigma ADC. The 0.13 mu m CMOS prototype of the CP based ADC achieves the same performance as a conventional ADC while consuming 66% lower OTA power in the front-end integrator. The CP based modulator realizes 87.8 dB SNDR, 89.2 dB SNR and 90 dB DR over a 10 kHz bandwidth with 148 mu W power consumption. The conventional ADC has similar performance but dissipates 241 mu W. The energy required per conversion-step for the CP based ADC (0.369 pJ/step) is almost 40% lower than that of the conventional ADC (0.607 pJ/step).
引用
收藏
页码：1310 / 1321
页数：12
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